ESP32-S3

Xtensa LX7 (ESP32-S3) · Xtensa · 240 MHz

Board: ESP32-S3 DevKit
Core: Xtensa LX7 (ESP32-S3)
Clock: 240 MHz
float / double: 32-bit / 64-bit

uint8_t add

12.7 M/s

rank 5 of 16 · 78.8 ns

uint32_t add

13.4 M/s

rank 2 of 16 · 74.6 ns

uint32_t divide

11 M/s

rank 2 of 16 · 91.3 ns

float multiply

12.7 M/s

rank 3 of 16 · 78.9 ns

Cycles per uint32 add

17.9 cycles

rank 9 of 16 — the clock-independent number

What every operation costs

Every numeric type, all five operations, as clock cycles per operation: the shape of this part's cost independent of its clock. The bars are the story of where it falls off a cliff — divide, 64-bit, floating point.

The same cells as nanoseconds per operation, median of three samples. Darker is slower; the small number is this board's rank in the fleet for that cell (1 = fastest of 16).

	Add	Subtract	Multiply	Divide	Modulo
uint8_t	78.8 ns #5 of 16	78.8 ns #6 of 16	78.9 ns #6 of 16	87.1 ns #2 of 16	91.3 ns #2 of 16
uint16_t	78.8 ns #3 of 16	78.8 ns #3 of 16	78.8 ns #3 of 16	98.6 ns #2 of 16	103 ns #2 of 16
uint32_t	74.6 ns #2 of 16	74.6 ns #2 of 16	74.6 ns #2 of 16	91.3 ns #2 of 16	95.5 ns #2 of 16
uint64_t	127 ns #6 of 14	128 ns #6 of 14	184 ns #8 of 14	556 ns #3 of 14	574 ns #3 of 14
float	78.9 ns #3 of 16	78.9 ns #3 of 16	78.9 ns #3 of 16	288 ns #7 of 16	513 ns #3 of 16
double	329 ns #4 of 16	358 ns #4 of 16	501 ns #5 of 16	1.94 µs #7 of 16	818 ns #3 of 16

ESP32-S3

What every operation costs

In the fleet

Head to head