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Teensy 4.0 vs ESP32

Cortex-M7 (i.MX RT1062) at 600 MHz against Xtensa LX6 (ESP32) at 240 MHz, on real hardware, same C kernels, clocks verified.

Teensy 4.0

Teensy 4.0

Cortex-M7 (i.MX RT1062)
Family
Arm Cortex-M
Board
Teensy 4.0
Clock
600 MHz
float / double
32-bit / 64-bit
ESP32

ESP32

Xtensa LX6 (ESP32)
Family
Xtensa
Board
ESP32
Clock
240 MHz
float / double
32-bit / 64-bit
Typical gap
6.82×
Teensy 4.0 faster, geometric mean of 30 cells
Biggest win for Teensy 4.0
34.2×
double divide
Closest cell
3.17×
uint64_t divide
Clock for clock
2.73×
Teensy 4.0 needs fewer cycles per op (2.50× clock gap)

Operation by operation

Every cell

How many times faster Teensy 4.0 is than ESP32, operations per second. Blue: Teensy 4.0 ahead. Orange: ESP32 ahead.

AddSubtractMultiplyDivideModulo
uint8_t 6.77× 77.4 M/s · 11.4 M/s 6.58× 75.3 M/s · 11.4 M/s 6.59× 75.3 M/s · 11.4 M/s 5.01× 52.3 M/s · 10.4 M/s 4.63× 46.3 M/s · 10 M/s
uint16_t 6.58× 75.3 M/s · 11.4 M/s 6.56× 75 M/s · 11.4 M/s 6.00× 68.6 M/s · 11.4 M/s 4.45× 41.5 M/s · 9.32 M/s 4.18× 37.5 M/s · 8.97 M/s
uint32_t 6.89× 82.8 M/s · 12 M/s 7.14× 85.7 M/s · 12 M/s 5.71× 68.6 M/s · 12 M/s 3.93× 39.3 M/s · 10 M/s 3.63× 34.8 M/s · 9.6 M/s
uint64_t 8.96× 63.2 M/s · 7.05 M/s 9.10× 63.2 M/s · 6.94 M/s 9.13× 43.7 M/s · 4.79 M/s 3.17× 5.54 M/s · 1.75 M/s 3.28× 5.54 M/s · 1.69 M/s
float 6.48× 77.7 M/s · 12 M/s 6.48× 77.7 M/s · 12 M/s 6.48× 77.7 M/s · 12 M/s 7.10× 27 M/s · 3.8 M/s 3.85× 6.67 M/s · 1.73 M/s
double 18.9× 56 M/s · 2.96 M/s 20.4× 54.7 M/s · 2.68 M/s 23.5× 43.7 M/s · 1.86 M/s 34.2× 15.7 M/s · 459 k/s 4.38× 4.84 M/s · 1.11 M/s

Where they sit in the fleet

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