Teensy 4.0 vs ESP32-S3
Cortex-M7 (i.MX RT1062) at 600 MHz against Xtensa LX7 (ESP32-S3) at 240 MHz, on real hardware, same C kernels, clocks verified.
Teensy 4.0
Cortex-M7 (i.MX RT1062)
- Family
- Arm Cortex-M
- Board
- Teensy 4.0
- Clock
- 600 MHz
- float / double
- 32-bit / 64-bit
ESP32-S3
Xtensa LX7 (ESP32-S3)
- Family
- Xtensa
- Board
- ESP32-S3 DevKit
- Clock
- 240 MHz
- float / double
- 32-bit / 64-bit
Typical gap
6.28×
Teensy 4.0 faster, geometric mean of 30 cells
Biggest win for Teensy 4.0
30.4×
double divide
Closest cell
3.08×
uint64_t divide
Clock for clock
2.51×
Teensy 4.0 needs fewer cycles per op (2.50× clock gap)
Operation by operation
Every cell
How many times faster Teensy 4.0 is than ESP32-S3, operations per second. Blue: Teensy 4.0 ahead. Orange: ESP32-S3 ahead.
| Add | Subtract | Multiply | Divide | Modulo | |
|---|---|---|---|---|---|
| uint8_t | 6.10× 77.4 M/s · 12.7 M/s | 5.93× 75.3 M/s · 12.7 M/s | 5.94× 75.3 M/s · 12.7 M/s | 4.56× 52.3 M/s · 11.5 M/s | 4.23× 46.3 M/s · 10.9 M/s |
| uint16_t | 5.93× 75.3 M/s · 12.7 M/s | 5.91× 75 M/s · 12.7 M/s | 5.40× 68.6 M/s · 12.7 M/s | 4.09× 41.5 M/s · 10.1 M/s | 3.86× 37.5 M/s · 9.72 M/s |
| uint32_t | 6.17× 82.8 M/s · 13.4 M/s | 6.39× 85.7 M/s · 13.4 M/s | 5.11× 68.6 M/s · 13.4 M/s | 3.59× 39.3 M/s · 11 M/s | 3.33× 34.8 M/s · 10.5 M/s |
| uint64_t | 8.02× 63.2 M/s · 7.87 M/s | 8.09× 63.2 M/s · 7.81 M/s | 8.03× 43.7 M/s · 5.45 M/s | 3.08× 5.54 M/s · 1.8 M/s | 3.18× 5.54 M/s · 1.74 M/s |
| float | 6.13× 77.7 M/s · 12.7 M/s | 6.13× 77.7 M/s · 12.7 M/s | 6.13× 77.7 M/s · 12.7 M/s | 7.77× 27 M/s · 3.48 M/s | 3.42× 6.67 M/s · 1.95 M/s |
| double | 18.4× 56 M/s · 3.04 M/s | 19.6× 54.7 M/s · 2.79 M/s | 21.9× 43.7 M/s · 2 M/s | 30.4× 15.7 M/s · 516 k/s | 3.96× 4.84 M/s · 1.22 M/s |