Teensy 4.0 vs XIAO MG24
Cortex-M7 (i.MX RT1062) at 600 MHz against Cortex-M33 (EFR32MG24) at 39 MHz, on real hardware, same C kernels, clocks verified.
Teensy 4.0
Cortex-M7 (i.MX RT1062)
- Family
- Arm Cortex-M
- Board
- Teensy 4.0
- Clock
- 600 MHz
- float / double
- 32-bit / 64-bit
XIAO MG24
Cortex-M33 (EFR32MG24)
- Family
- Arm Cortex-M
- Board
- XIAO MG24 Sense
- Clock
- 39 MHz
- float / double
- 32-bit / 64-bit
Typical gap
28.2×
Teensy 4.0 faster, geometric mean of 30 cells
Biggest win for Teensy 4.0
151×
double add
Closest cell
17.5×
float divide
Clock for clock
1.83×
Teensy 4.0 needs fewer cycles per op (15.4× clock gap)
Operation by operation
Every cell
How many times faster Teensy 4.0 is than XIAO MG24, operations per second. Blue: Teensy 4.0 ahead. Orange: XIAO MG24 ahead.
| Add | Subtract | Multiply | Divide | Modulo | |
|---|---|---|---|---|---|
| uint8_t | 28.5× 77.4 M/s · 2.71 M/s | 27.8× 75.3 M/s · 2.71 M/s | 29.9× 75.3 M/s · 2.52 M/s | 21.4× 52.3 M/s · 2.44 M/s | 24.2× 46.3 M/s · 1.92 M/s |
| uint16_t | 25.6× 75.3 M/s · 2.94 M/s | 25.6× 75 M/s · 2.93 M/s | 23.4× 68.6 M/s · 2.93 M/s | 19.9× 41.5 M/s · 2.09 M/s | 21.2× 37.5 M/s · 1.77 M/s |
| uint32_t | 25.9× 82.8 M/s · 3.19 M/s | 26.8× 85.7 M/s · 3.19 M/s | 23.4× 68.6 M/s · 2.93 M/s | 17.8× 39.3 M/s · 2.21 M/s | 17.7× 34.8 M/s · 1.96 M/s |
| uint64_t | 26.8× 63.2 M/s · 2.36 M/s | 26.8× 63.2 M/s · 2.36 M/s | 22.2× 43.7 M/s · 1.97 M/s | 19.5× 5.54 M/s · 285 k/s | 19.5× 5.54 M/s · 285 k/s |
| float | 24.5× 77.7 M/s · 3.18 M/s | 24.5× 77.7 M/s · 3.18 M/s | 24.4× 77.7 M/s · 3.18 M/s | 17.5× 27 M/s · 1.54 M/s | 21.0× 6.67 M/s · 318 k/s |
| double | 151× 56 M/s · 370 k/s | 148× 54.7 M/s · 368 k/s | 86.9× 43.7 M/s · 503 k/s | 41.4× 15.7 M/s · 379 k/s | 29.4× 4.84 M/s · 165 k/s |